Last edited by Danos
Tuesday, May 5, 2020 | History

4 edition of An array architecture for reconfigurable datapaths found in the catalog.

An array architecture for reconfigurable datapaths

Qiang Wang

An array architecture for reconfigurable datapaths

  • 207 Want to read
  • 33 Currently reading

Published by National Library of Canada in Ottawa .
Written in English


Edition Notes

Thesis (M.A.Sc.)--University of Toronto, 1993.

SeriesCanadian theses = Thèses canadiennes
The Physical Object
FormatMicroform
Pagination2 microfiches : negative.
ID Numbers
Open LibraryOL15101051M
ISBN 100315835427
OCLC/WorldCa31286784


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An array architecture for reconfigurable datapaths by Qiang Wang Download PDF EPUB FB2

A new architecture, QUKU, is proposed for implementing stream-based algorithms on FPGAs, which combines the advantages of FPGA and Coarse Grain Reconfigurable Arrays (CGRAs).

Apart from the introduction and the conclusion, the main chapters of the book are the following: Architecture of reconfigurable systems, which presents the technology and the architecture used in.

This paper examines reconfigurable pipelined datapaths (RaPiDs), a new architecture style for computation-intensive applications that bridges the cost/perf. Synthesis of efficiently reconfigurable datapaths for reconfigurable computing Conference Paper January with 10 Reads How we measure 'reads'.

Datapath Merging and Interconnection Sharing for Reconfigurable Architectures This approach is based on the solution of a maximum clique problem that merges datapaths one at a time.

A new array fabric for coarse-grained reconfigurable architecture. In: Proceedings of the IEEE EuroMicro Conference on Digital System Design, pp.

– () Google Scholar Cited by: 7 Coarse-grained Configurable Architectures Chapter 2 The DP-FPGA is the first approach, where a reconfigurable architecture has been optimized to implement datapaths.